CS4382A-DQZ【PDF 22/50 页】IC DAC 8CH 114DB 192KHZ 48-LQFP

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录1991

18页 19页 20页 21页 [22页]23页 24页 25页 26页

DS618F2

CS4382A

4.13

Recommended Procedure for Switching Operational Modes

For systems where the absolute minimum in clicks and pops is required, it is recommended that the MUTE

bits are set prior to changing significant DAC functions (such as changing sample rates or clock sources).

The mute bits may then be released after clocks have settled and the proper modes have been set.

It is required to have the device held in reset if the minimum high/low time specs of MCLK cannot be met

during clock source changes.

4.14

Control Port Interface

The Control Port is used to load all the internal register settings in order to operate in Software Mode (see

the “Filter Plots” on page 42). The operation of the Control Port may be completely asynchronous with the

audio sample rate. However, to avoid potential interference problems, the Control Port pins should remain

static if no operation is required.

The Control Port operates in one of two modes: IC or SPI.

4.14.1

MAP Auto Increment

The device has MAP (memory address pointer) auto-increment capability enabled by the INCR bit (also

the MSB) of the MAP. If INCR is set to 0, MAP will stay constant for successive IC writes or reads and

SPI writes. If INCR is set to 1, MAP will auto increment after each byte is written, allowing block reads or

writes of successive registers.

4.14.2

IC Mode

In the IC Mode, data is clocked into and out of the bi-directional serial control data line, SDA, by the serial

Control Port clock, SCL (see Figure 18 for the clock to data relationship). There is no CS pin. Pin AD0

enables the user to alter the chip address (001100[AD0][R/W]) and should be tied to VLC or GND, as re-

quired, before powering up the device. If the device ever detects a high-to-low transition on the AD0/CS

pin after power-up, SPI Mode will be selected.

4.14.2.1 IC Write

To write to the device, follow the procedure below while adhering to the Control Port Switching Specifica-

tions in Section 2.

1. Initiate a START condition to the IC bus followed by the address byte. The upper 6 bits must be

001100. The seventh bit must match the setting of the AD0 pin, and the eighth must be 0. The eighth

bit of the address byte is the R/W bit.

2. Wait for an acknowledge (ACK) from the part; then write to the memory address pointer, MAP. This

byte points to the register to be written.

3. Wait for an acknowledge (ACK) from the part; then write the desired data to the register pointed to by

the MAP.

4. If the INCR bit (see Section 4.14.1) is set to 1, repeat the previous step until all the desired registers

are written, then initiate a STOP condition to the bus.

5. If the INCR bit is set to 0 and further IC writes to other registers are desired, it is necessary to initiate

a repeated START condition and follow the procedure detailed from step 1. If no further writes to other

registers are desired, initiate a STOP condition to the bus.

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式